Ph.D. Student • UCF ECE

Ishraq Tashdid

Hardware security, formal verification, and LLM-assisted threat modeling across hardware–firmware–software boundaries.

SoC Security Formal Verification Threat Modeling (CWE/CVE/CAPEC) LLM-assisted Security Reasoning Chiplet / SiP Authentication

About

I am a Ph.D. student in Computer Engineering at the University of Central Florida, advised by Dr. Sazadur Rahman. I am a UCF Trustees Doctoral Fellow and a Future Faculty Laureate (FFL) awardee.

My work focuses on building practical, automation-driven security verification flows for modern SoCs, with an emphasis on LLM-guided threat modeling, assertion generation, and formal proof. I also work on chiplet/System-in-Package authentication and secure hardware design.

Before my Ph.D., I worked for an Irvine start-up as a Hardware Verification Engineer on RISC-V processor design and verification.

Current Focus

  • ATLAS: AI-assisted threat-to-assertion learning for SoC security verification
  • System-level harness generation and security property quality checking
  • InterPUF: distributed chiplet/interposer authentication using PUF + MPC
  • Formal verification workflows with JasperGold and static/AST-driven reasoning

Highlights

DAC 2026

ATLAS accepted at DAC 2026 for AI-assisted threat modeling and formal security verification for SoCs. Also selected as a DAC Young Fellow.

HOST 2026

InterPUF accepted at HOST 2026 for distributed chiplet/interposer authentication using PUFs and MPC.

MLCAD 2025 Best Paper Nominee

BeyondPPA — reliability-aware macro placement using human-inspired reinforcement learning.

Selected Publications

ATLAS — DAC 2026

AI-assisted threat-to-assertion learning for SoC security verification.

InterPUF — IEEE HOST 2026

Distributed chiplet/interposer authentication using physically unclonable functions and multi-party computation.

RoutePUF — GOMACTech 2026

Routing-based PUF for secure interposer authentication in chiplet systems.

AuthenTree — IEEE PAINE 2025

Scalable MPC-based distributed trust architecture for chiplet-based heterogeneous systems.

BeyondPPA — MLCAD 2025 Best Paper Nominee

Human-inspired reinforcement learning for reliability-aware macro placement.

ECOLogic — ICCD 2025

Enabling circular, obfuscated, and adaptive logic via eFPGA-augmented SoCs.

SAFE-SiP — GLSVLSI 2025

Secure authentication framework for System-in-Package using multi-party computation.

Full list and details available in the CV.

News

Latest updates on papers, talks, awards, and milestones.